Development of a New Solid State Fault Current Limiter for Effective Fault Current Limitation in Wind-Integrated Grids

Abstract

The increasing penetration of wind energy into modern power grids introduces new challenges, particularly regarding fault current levels and voltage stability during disturbances. This study proposes and evaluates a new Solid State Fault Current Limiter (SSFCL) topology for mitigating the adverse effects of faults in wind-integrated power systems. The proposed SSFCL consists of a bridge section and a shunt branch, designed to limit fault current while maintaining power quality. Unlike conventional SSFCLs, the proposed topology incorporates both DC and AC reactors with an Integrated Gate-Commutated Thyristor (IGCT) switch, to provide current limiting and voltage stabilization, effectively mitigating the negative impacts of faults. A comprehensive MATLAB/Simulink-based simulation is conducted on a realistic grid model. First, appropriate AC and DC reactor impedances are selected to balance fault current suppression, cost, and dynamic response. Then, three fault scenarios, transmission line, distribution grid, and domestic network, are analyzed to assess the fault current limiting performance and voltage sag mitigation of the SSFCL. In the simulation analysis, the DC reactor current and the voltage across the SSFCL device are continuously monitored to evaluate its dynamic response and effectiveness during fault and normal operating conditions. In addition, the fault current contribution from the wind farm is assessed with and without the integration of the SSFCL, along with the voltage profile at the Point of Common Coupling (PCC), to determine the limiter’s impact on system stability and power quality. Finally, the performance of the proposed SSFCL is compared to that of the resistive-type superconducting fault current limiter (R-SFCL) under identical fault scenarios to assess the technical and economic standpoints of the proposed SSFCL. Simulation results show that the SSFCL reduces the peak fault current by up to 29% and improves the voltage profile at the PCC by up to 42%, providing comparable performance to the R-SFCL while avoiding the need for cryogenic systems.