preprint · Research Square
Abstract In many fields including aerospace, automotive, and telecommunications, Math-Works’ MATLAB/Simulink is the current de facto standard for model-based design. The strengths of Simulink are rapid design and algorithm exploration. Models created with Simulink are just functional. Therefore, designers cannot effortlessly consider a Simulink model’s architecture. As today’s architectures are optimized to run on multicore, Software running on multicore processors must be parallelized to fully utilize their natural performance. For instance, designers need to understand how a Simulink model could be parallelized and how an adequate multicore architecture is selected. This paper focuses on the dataflow-based parallelization of Simulink models and proposes a method based on dataflow to measure the performance of parallelized Simulink models running on multi-core architectures. Throughout the parallelization process, the model is converted into a Hierarchical Synchronous DataFlow Graph (HSDFG) keeping its original semantics, and each composite node in the graph is flattened. Then, the graph is mapped and scheduled into a multicore architecture with the ultimate objective that minimizing the total execution time. In the experiment of applying the proposed approach to a real model from the automotive industry, the execution time of the parallelized model could be reduced successfully on a multi-core processor.
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DOI: 10.21203/rs.3.rs-3140464/v1
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